Voice algorithms have a reputation for being disappointing when the real problem is upstream of them. Beamforming, AEC and noise suppression all amplify what the hardware delivers — including its mistakes.
Bestom engineering note — written by our own design and BSP engineers from work on Rockchip platforms. Platform parameters quoted here are taken from our published datasheets; see Core Boards & SoM. For translated community notes, see the Tech Notes index.
Beamforming relies on consistent phase and amplitude relationships between channels. AEC relies on a clean, time-aligned reference of what the speaker played. When either input is wrong, every algorithm downstream inherits the error — and it shows up as "the voice algorithm is bad" rather than "the microphone front end is wrong".
Sensitivity spread between channels directly degrades beamforming. Specifying matched parts is not the same as receiving matched parts. Ask for sensitivity and phase binning, and verify the bins on incoming lots.
Check: the tolerance in dB that the array algorithm assumes, written next to the part's actual bin tolerance.
Spacing sets the frequency range over which the array can steer without spatial aliasing. The geometry also has to survive the enclosure: an array measured on a development board and then buried behind a grille and a logo is a different array.
Check: spacing, the usable frequency band, and the acoustic transparency of the actual front panel.
Port size, port depth, cavity volume and sealing decide the low-frequency response and how much structure-borne noise reaches the capsule. This is a mechanical design problem with an audio consequence.
Check: the port is sized as an acoustic element, not as a mechanical hole.
The reference must be the signal actually sent to the amplifier, time-aligned and gain-matched to what the speaker emits. A reference tapped before the amplifier, or delayed by a software buffer, is the classic cause of echo cancellation that "half works".
Check: where the reference is tapped, and the total delay from playback buffer to speaker.
| Item | Why it matters | What to specify |
|---|---|---|
| PDM clock integrity | PDM is a clock-driven interface; jitter and ringing translate directly into noise on the captured signal | Clock trace routing, termination, and separation from switching nodes — reviewed as a signal-integrity item, not an afterthought |
| Channel count and sample rates | Channel count is a hard platform constraint; it cannot be expanded later in software | The exact channel count the array and the algorithms need, matched to the platform's PDM capability before the platform is chosen |
| Power and clock noise | Audio rails next to switching regulators produce artefacts that present as algorithm failure | Dedicated low-noise regulation for the analogue domain, and a clock source that is not sharing a noisy net |
| Grounding and return paths | Ground loops between the microphone board, the main board and the amplifier are a common noise source | A single defined return strategy, agreed between the board and enclosure designs |
| Synchronisation across channels | Channels captured on different interfaces or at different instants destroy the phase relationships beamforming depends on | All array channels sampled by the same clock domain, with a documented sample alignment |
When voice is one function among many, the array hangs off an application processor — RK3566 (M66) or higher. The hardware rules above do not change; only the host does.
Every item on this page is measurable, and the measurement has to happen on the actual enclosure. An array tuned on an open bench and then installed in a sealed product is an untested array.
Send us the product spec or the constraint list. We design and develop custom hardware on Rockchip platforms — and we will tell you if the platform you have in mind is the wrong one.
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